· By Linked Electronics Technical Team

The artificial intelligence revolution — from ChatGPT and large language models to autonomous driving neural networks — is fundamentally reshaping the semiconductor and PCB industries. AI accelerator chips from NVIDIA (H200, B200), AMD (MI300X), Intel (Gaudi 3), and China's domestic AI chip designers (Huawei Ascend 910B, Biren BR100, Cambricon Siyuan) demand unprecedented levels of compute, memory bandwidth, and inter-chip communication. The PCBs that interconnect these chips are among the most complex ever manufactured, pushing the limits of HDI technology, material science, and fabrication precision.

The AI Server PCB: More Layers, More Complexity

A modern AI training server PCB — whether an NVIDIA HGX baseboard or a custom-designed AI accelerator board for a hyperscale data center — typically features: 24–40+ layers of high-density interconnect, multiple blind and buried via structures at each layer transition, ultra-low-loss materials (Megtron 6/7, IT-968G, Rogers 4350B) for 112 Gbps PAM-4 signaling, back-drilled vias to eliminate stub resonances on high-speed traces, and precise impedance control (±5% or better across multiple differential pair geometries). These boards often cost $2,000–$5,000+ each in prototype quantities due to material costs, process complexity, and low first-pass yields on advanced designs.

HDI Technology Evolution: From Smartphones to AI Servers

High-Density Interconnect (HDI) technology — originally developed for smartphones where board real estate is extremely constrained — is now migrating to AI server and networking applications. The key HDI techniques include: micro-vias (laser-drilled vias typically 0.1mm diameter connecting adjacent layers), stacked and staggered via structures for multi-layer transitions, via-in-pad design for BGA breakout routing (placing micro-vias directly within SMD pads to save space), and any-layer HDI (every layer pair connected by micro-vias, enabling the highest component density). Linked Electronics offers HDI PCB manufacturing from 4 to 40 layers with laser-drilled micro-vias down to 0.075mm and mechanical vias to 0.15mm.

Signal Integrity at 112 Gbps and Beyond

As data rates on AI server backplanes and chip-to-chip interconnects move from 56 Gbps PAM-4 to 112 Gbps PAM-4 — and with 224 Gbps on the IEEE roadmap — every aspect of PCB design and manufacturing affects signal integrity. Key considerations include: copper surface roughness (smooth copper foils reduce high-frequency conductor losses), glass weave effect (using spread glass or low-Dk glass to minimize skew within differential pairs), back-drilling precision (removing unused via stubs that cause signal reflections), and laminate selection (Df below 0.004 for 112 Gbps, below 0.002 for 224 Gbps).

Thermal Management Challenges

AI accelerator chips — NVIDIA's H200 GPU draws 700W and the B200 exceeds 1,000W — generate enormous heat flux. PCB design for thermal management involves: heavy copper layers (4–10 OZ) as embedded thermal planes, metal-core or IMS construction for power stages, thermal vias (arrays of plated through-holes filled with thermally conductive material), and increasingly, direct liquid cooling where coolant flows through cold plates mounted directly above the chips. PCB materials must maintain dimensional stability and electrical performance through repeated thermal cycles from ambient to 100°C+.

The China AI Chip Ecosystem

US export controls on advanced AI chips (October 2022, updated October 2023 and 2024) have accelerated China's domestic AI chip development. Huawei's Ascend series, Biren Technology, Cambricon, Moore Threads, and Enflame are all ramping AI accelerator production. These chips require the same advanced PCB technologies as their Western counterparts, creating strong domestic demand for high-end PCB manufacturing. Linked Electronics supports AI hardware customers with HDI PCBs, impedance-controlled designs, and quick-turn prototyping services.


Need Advanced HDI PCBs for AI Hardware?

Linked Electronics manufactures high-layer-count HDI PCBs with precision impedance control. Contact our engineering team to discuss your AI server or accelerator PCB requirements.

Discuss AI PCB Requirements

← Back to All Articles